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Enumeration of Minimum Circuit Structures

发布日期:2019-05-05 浏览量:8

题目:Enumeration of Minimum Circuit Structures
报告人:Dr. Alan Mishchenko (UC Berkeley)
时间:2019年5月6日下午3:00 - 4:30
地点:张江校区微电子楼233室

Abstract
The paper focuses on logic synthesis of minimum-size circuits for small Boolean functions using structural enumeration. Known results for completely-specified functions up to five inputs are reproduced and independently verified. Additionally, for the first time, the results are presented on the number of structurally different minimum circuits for each NPN class of Boolean functions up to five inputs. The actual structures are made publicly available with potential applications in FPGA architecture exploration, peephole optimization by circuit rewriting, and approximate logic synthesis.

Biography
Alan graduated with M.S. from Moscow Institute of Physics and Technology (Moscow, Russia) in 1993 and received his Ph.D. from Glushkov Institute of Cybernetics (Kiev, Ukraine) in 1997. In 2002, Alan joined the EECS Department at University of California, Berkeley, where he is currently a full researcher. His research is in computationally efficient logic synthesis and formal verification.


联系人:王伶俐