Speaker: Dr. Larry Zhao, ( Technical Director, Lam Research )
Time: 10:00-11:30, Thursday, April 12 2018
Interconnect has become a bottleneck in the performance of logic devices due to intrinsic limitations to reduce RC delays. This talk will be divided into three parts. The first part will discuss the history of interconnect technology and the key innovations that have occurred over the past two decades in the areas of metallization, dielectric materials, patterning, and reliability. The second part will discuss new challenges the industry is currently facing and potential solutions to address those challenges in order to continue the interconnect scaling. The third part will discuss the importance of barrier-less interconnect and how to use the Pcap test structure to determine whether there is a reliability risk for alternative metals to be considered for barrier-less interconnect.
Dr. Larry Zhao is a Technical Director at Lam Research and manages the logic metallization program to provide solutions for the semiconductor industry to meet the scaling challenges in the metallization of metal gate, MOL contact, and BEOL interconnect. Dr. Zhao received B.S. degree in Materials Science and Engineering from Shanghai Jiaotong University in 1984 and M.S. degree in Engineering from Dartmouth College in 1993. He studied for PhD degree in Materials Science at Columbia University from 1993 to 1997 and received PhD degree in Electrical Engineering from K.U. Leuven, Belgium in 2012. He has more than 20 years of R&D experience and is a recognized expert in process integration, reliability, and interconnect scaling with one published book chapter, more than 80 publications, and 24 granted U.S. patents. He served on the prestigious Technical Advisory Board to Semiconductor Research Corporation (SRC) for Interconnect Program from 2012 to 2014. Currently, he serves on the technical committee of IEEE International Interconnect Technology Conference (IITC) and China Semiconductor Technology International Conference (CSTIC).