Exploiting Unique Characteristics of Beyond-CMOS Transistors for
Spatial-Temporal Information Processing

Sharon Hu
IEEE fellow,University of Notre Dame




As CMOS technology gets ever closer to its scaling limit, research on transistors based on different materials and operating principles has become increasingly important. When compared to CMOS devices, emerging transistor technologies could offer improved subthreshold swing/steeper slopes, work at lower operating voltages (e.g., 0.2-0.3 V), and be more robust to process and/or temperature variations, which could lead to lower power consumption and higher reliability for processors based on the von Neumann architecture. However, recent studies suggest that many of the emerging transistors being investigated, if used as simple drop-in replacement for MOSFETs, may only achieve speedups that mirror historical trends for the most highly parallelizable benchmarks (>99%). Nevertheless, some beyond-CMOS transistors demonstrate other unique characteristics such as negative differential resistance, hysteresis, and oscillatory behavior. Such device characteristics have the potential to greatly simply the implementation of certain non von Neumann processors as well as other computation kernels, and may offer orders of magnitude improvement in terms of power, performance and capability.
In this talk, I will begin by reviewing some architectural benchmark data for a number of beyond-CMOS devices to summarize the predicted performance gain. I will then provide a brief overview of several beyond-CMOS devices and emphasize their I-V characteristics that are atypical when compared to CMOS devices.? Finally, I will discuss the impact of said devices on circuits and architectures.? More specifically, I will highlight our work in exploiting these emerging devices for spatial-temporal information processing via novel implementations of cellular neural networks (CNNs), CNN-inspired architectures and several other basic computing kernels.


Sharon Hu is a professor in the department of Computer Science and Engineering at the University of Notre Dame, Notre Dame, Indiana, USA. Her research interests include low-power system design, circuit and architecture design with emerging technologies, hardware/software co-design and real-time embedded systems. She has published more than 270 papers in these areas, and received the Best Paper Award from the Design Automation Conference in 2001 and from the IEEE Symposium on Nanoscale Architectures in 2009. She is the Vice General Chair of Design Automation Conference in 2017. She also served as Associate Editor for IEEE Transactions on VLSI, ACM Transactions on Design Automation of Electronic Systems, ACM Transactions on Embedded Computing Systems. Sharon Hu is a Fellow of the IEEE.



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